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<div class="header">
  <div class="summary">
<a href="#enum-members">Enumerations</a>  </div>
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<div class="title">PMU: Power Management Unit</div>  </div>
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<div class="contents">
<a name="details" id="details"></a><h2 class="groupheader">Overview</h2>
<p>The MCUXpresso SDK provides a Peripheral driver for the Power Management Unit (PMU) module of MCUXpresso SDK devices. The power management unit (PMU) is designed to simplify the external power interface. The power system can be split into the input power sources and their characteristics, the integrated power transforming and controlling elements, and the final load interconnection and requirements. By using the internal LDO regulators, the number of external supplies is greatly reduced.</p>
<p>The PMU driver provides the APIs to adjust the work condition of each regulator, and can gate the power of some modules. </p>
<table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="enum-members"></a>
Enumerations</h2></td></tr>
<tr class="memitem:ga91d439b8d5584f55f3e596963d3db8c3"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu.html#ga91d439b8d5584f55f3e596963d3db8c3">_pmu_status_flags</a> { <br/>
&#160;&#160;<a class="el" href="group__pmu.html#gga91d439b8d5584f55f3e596963d3db8c3a394fea19008801a519d8739020709a19">kPMU_1P1RegulatorOutputOK</a> = (1U &lt;&lt; 0U), 
<br/>
&#160;&#160;<a class="el" href="group__pmu.html#gga91d439b8d5584f55f3e596963d3db8c3ac52322dd21cce9696c3dd7291f01808e">kPMU_1P1BrownoutOnOutput</a> = (1U &lt;&lt; 1U), 
<br/>
&#160;&#160;<a class="el" href="group__pmu.html#gga91d439b8d5584f55f3e596963d3db8c3a5d2df2491523287e130b1e36ff457d42">kPMU_3P0RegulatorOutputOK</a> = (1U &lt;&lt; 2U), 
<br/>
&#160;&#160;<a class="el" href="group__pmu.html#gga91d439b8d5584f55f3e596963d3db8c3a76b4070aa90b7471b8f95481f96d20f7">kPMU_3P0BrownoutOnOutput</a> = (1U &lt;&lt; 3U), 
<br/>
&#160;&#160;<a class="el" href="group__pmu.html#gga91d439b8d5584f55f3e596963d3db8c3a536d44e80cffab2c47b9144628dac099">kPMU_2P5RegulatorOutputOK</a> = (1U &lt;&lt; 4U), 
<br/>
&#160;&#160;<a class="el" href="group__pmu.html#gga91d439b8d5584f55f3e596963d3db8c3a74380ff6243784a0a997d9d69420b351">kPMU_2P5BrownoutOnOutput</a> = (1U &lt;&lt; 5U)
<br/>
 }</td></tr>
<tr class="memdesc:ga91d439b8d5584f55f3e596963d3db8c3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Status flags.  <a href="group__pmu.html#ga91d439b8d5584f55f3e596963d3db8c3">More...</a><br/></td></tr>
<tr class="separator:ga91d439b8d5584f55f3e596963d3db8c3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6b47a2e7d1775049cdcfb744b37ecadb"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu.html#ga6b47a2e7d1775049cdcfb744b37ecadb">pmu_1p1_weak_reference_source_t</a> { <br/>
&#160;&#160;<a class="el" href="group__pmu.html#gga6b47a2e7d1775049cdcfb744b37ecadba66d71c9d447ecdb90b6b2b1bd025168e">kPMU_1P1WeakReferenceSourceAlt0</a> = 0U, 
<br/>
&#160;&#160;<a class="el" href="group__pmu.html#gga6b47a2e7d1775049cdcfb744b37ecadbace5078924f5b087c2791e3fc6ba958e4">kPMU_1P1WeakReferenceSourceAlt1</a> = 1U
<br/>
 }</td></tr>
<tr class="memdesc:ga6b47a2e7d1775049cdcfb744b37ecadb"><td class="mdescLeft">&#160;</td><td class="mdescRight">The source for the reference voltage of the weak 1P1 regulator.  <a href="group__pmu.html#ga6b47a2e7d1775049cdcfb744b37ecadb">More...</a><br/></td></tr>
<tr class="separator:ga6b47a2e7d1775049cdcfb744b37ecadb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf7f949a78166a27563c8a0f2ebc0af31"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu.html#gaf7f949a78166a27563c8a0f2ebc0af31">pmu_3p0_vbus_voltage_source_t</a> { <br/>
&#160;&#160;<a class="el" href="group__pmu.html#ggaf7f949a78166a27563c8a0f2ebc0af31a825e44d25be34386eadd03f99b66f857">kPMU_3P0VBusVoltageSourceAlt0</a> = 0U, 
<br/>
&#160;&#160;<a class="el" href="group__pmu.html#ggaf7f949a78166a27563c8a0f2ebc0af31aefdca33e631b3b7b3b9b6a412254b2f7">kPMU_3P0VBusVoltageSourceAlt1</a> = 1U
<br/>
 }</td></tr>
<tr class="memdesc:gaf7f949a78166a27563c8a0f2ebc0af31"><td class="mdescLeft">&#160;</td><td class="mdescRight">Input voltage source for LDO_3P0 from USB VBus.  <a href="group__pmu.html#gaf7f949a78166a27563c8a0f2ebc0af31">More...</a><br/></td></tr>
<tr class="separator:gaf7f949a78166a27563c8a0f2ebc0af31"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4a1cbd5cfe295ba24ff9d6460c3f660e"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu.html#ga4a1cbd5cfe295ba24ff9d6460c3f660e">pmu_core_reg_voltage_ramp_rate_t</a> { <br/>
&#160;&#160;<a class="el" href="group__pmu.html#gga4a1cbd5cfe295ba24ff9d6460c3f660eacf2fdfb31db3e83e3306c3d98ffbe9f9">kPMU_CoreRegVoltageRampRateFast</a> = 0U, 
<br/>
&#160;&#160;<a class="el" href="group__pmu.html#gga4a1cbd5cfe295ba24ff9d6460c3f660eadab48795d60139c6009a5de52277aa7f">kPMU_CoreRegVoltageRampRateMediumFast</a> = 1U, 
<br/>
&#160;&#160;<a class="el" href="group__pmu.html#gga4a1cbd5cfe295ba24ff9d6460c3f660ea2afb37a84985c3eeb1146aaee869f891">kPMU_CoreRegVoltageRampRateMediumSlow</a> = 2U, 
<br/>
&#160;&#160;<a class="el" href="group__pmu.html#gga4a1cbd5cfe295ba24ff9d6460c3f660ea8744a5ed680a59150feca86ba0357d12">kPMU_CoreRegVoltageRampRateSlow</a> = 0U
<br/>
 }</td></tr>
<tr class="memdesc:ga4a1cbd5cfe295ba24ff9d6460c3f660e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Regulator voltage ramp rate.  <a href="group__pmu.html#ga4a1cbd5cfe295ba24ff9d6460c3f660e">More...</a><br/></td></tr>
<tr class="separator:ga4a1cbd5cfe295ba24ff9d6460c3f660e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga65e18b042624dd19870ac095ab6aef01"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu.html#ga65e18b042624dd19870ac095ab6aef01">_pmu_power_gate</a> { <br/>
&#160;&#160;<a class="el" href="group__pmu.html#gga65e18b042624dd19870ac095ab6aef01af1c5da57cf62f187a6ddf0c8fce6170f">kPMU_PowerGateDisplay</a> = PMU_LOWPWR_CTRL_MIX_PWRGATE_MASK, 
<br/>
&#160;&#160;<a class="el" href="group__pmu.html#gga65e18b042624dd19870ac095ab6aef01a073ae1b9d06d288c20385ee44ee1238b">kPMU_PowerGateDisplayLogic</a> = PMU_LOWPWR_CTRL_DISPLAY_PWRGATE_MASK, 
<br/>
&#160;&#160;<a class="el" href="group__pmu.html#gga65e18b042624dd19870ac095ab6aef01a4bcd6884f0891a6905afb5f21230568b">kPMU_PowerGateL2</a> = PMU_LOWPWR_CTRL_L2_PWRGATE_MASK, 
<br/>
&#160;&#160;<a class="el" href="group__pmu.html#gga65e18b042624dd19870ac095ab6aef01a2e6b7f9e7ebe3225d3b5bf79ec206b3d">kPMU_PowerGateL1</a> = PMU_LOWPWR_CTRL_L1_PWRGATE_MASK, 
<br/>
&#160;&#160;<a class="el" href="group__pmu.html#gga65e18b042624dd19870ac095ab6aef01aed0c6e0fb000887afcfee7d55be9c6b5">kPMU_PowerGateRefTopIBias</a> = PMU_LOWPWR_CTRL_REFTOP_IBIAS_OFF_MASK
<br/>
 }</td></tr>
<tr class="memdesc:ga65e18b042624dd19870ac095ab6aef01"><td class="mdescLeft">&#160;</td><td class="mdescRight">Mask values of power gate.  <a href="group__pmu.html#ga65e18b042624dd19870ac095ab6aef01">More...</a><br/></td></tr>
<tr class="separator:ga65e18b042624dd19870ac095ab6aef01"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8178a1394f1448946497f11062aac986"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu.html#ga8178a1394f1448946497f11062aac986">pmu_power_bandgap_t</a> { <br/>
&#160;&#160;<a class="el" href="group__pmu.html#gga8178a1394f1448946497f11062aac986a47cf46f2e5470bebdd7babc9b4d3cd20">kPMU_NormalPowerBandgap</a> = 0U, 
<br/>
&#160;&#160;<a class="el" href="group__pmu.html#gga8178a1394f1448946497f11062aac986a8f4daf5e5847e848d7feb71b99685763">kPMU_LowPowerBandgap</a> = 1U
<br/>
 }</td></tr>
<tr class="memdesc:ga8178a1394f1448946497f11062aac986"><td class="mdescLeft">&#160;</td><td class="mdescRight">Bandgap select.  <a href="group__pmu.html#ga8178a1394f1448946497f11062aac986">More...</a><br/></td></tr>
<tr class="separator:ga8178a1394f1448946497f11062aac986"><td class="memSeparator" colspan="2">&#160;</td></tr>
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
Driver version</h2></td></tr>
<tr class="memitem:ga0dc3464cb828e0c8195cf6f4fd9fc9a8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu.html#ga0dc3464cb828e0c8195cf6f4fd9fc9a8">FSL_PMU_DRIVER_VERSION</a>&#160;&#160;&#160;(MAKE_VERSION(2, 0, 0))</td></tr>
<tr class="memdesc:ga0dc3464cb828e0c8195cf6f4fd9fc9a8"><td class="mdescLeft">&#160;</td><td class="mdescRight">PMU driver version.  <a href="#ga0dc3464cb828e0c8195cf6f4fd9fc9a8">More...</a><br/></td></tr>
<tr class="separator:ga0dc3464cb828e0c8195cf6f4fd9fc9a8"><td class="memSeparator" colspan="2">&#160;</td></tr>
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
Status.</h2></td></tr>
<tr class="memitem:gaf5cfe704de9542b230132e63f735f191"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf5cfe704de9542b230132e63f735f191"></a>
uint32_t&#160;</td><td class="memItemRight" valign="bottom"><b>PMU_GetStatusFlags</b> (PMU_Type *base)</td></tr>
<tr class="separator:gaf5cfe704de9542b230132e63f735f191"><td class="memSeparator" colspan="2">&#160;</td></tr>
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
1P1 Regular</h2></td></tr>
<tr class="memitem:gac2f5999f1ad10dcddb29788b4033bb34"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu.html#gac2f5999f1ad10dcddb29788b4033bb34">PMU_1P1SetWeakReferenceSource</a> (PMU_Type *base, <a class="el" href="group__pmu.html#ga6b47a2e7d1775049cdcfb744b37ecadb">pmu_1p1_weak_reference_source_t</a> option)</td></tr>
<tr class="memdesc:gac2f5999f1ad10dcddb29788b4033bb34"><td class="mdescLeft">&#160;</td><td class="mdescRight">Selects the source for the reference voltage of the weak 1P1 regulator.  <a href="#gac2f5999f1ad10dcddb29788b4033bb34">More...</a><br/></td></tr>
<tr class="separator:gac2f5999f1ad10dcddb29788b4033bb34"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaac00c4a1c3df766df1d580e7803ade42"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu.html#gaac00c4a1c3df766df1d580e7803ade42">PMU_1P1EnableWeakRegulator</a> (PMU_Type *base, bool enable)</td></tr>
<tr class="memdesc:gaac00c4a1c3df766df1d580e7803ade42"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enables the weak 1P1 regulator.  <a href="#gaac00c4a1c3df766df1d580e7803ade42">More...</a><br/></td></tr>
<tr class="separator:gaac00c4a1c3df766df1d580e7803ade42"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad8349891ff819c3218c6bfc9336af8fc"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu.html#gad8349891ff819c3218c6bfc9336af8fc">PMU_1P1SetRegulatorOutputVoltage</a> (PMU_Type *base, uint32_t value)</td></tr>
<tr class="memdesc:gad8349891ff819c3218c6bfc9336af8fc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Adjust the 1P1 regulator output voltage.  <a href="#gad8349891ff819c3218c6bfc9336af8fc">More...</a><br/></td></tr>
<tr class="separator:gad8349891ff819c3218c6bfc9336af8fc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga86c8fff119565ff331130a4a860e9b35"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu.html#ga86c8fff119565ff331130a4a860e9b35">PMU_1P1SetBrownoutOffsetVoltage</a> (PMU_Type *base, uint32_t value)</td></tr>
<tr class="memdesc:ga86c8fff119565ff331130a4a860e9b35"><td class="mdescLeft">&#160;</td><td class="mdescRight">Adjust the 1P1 regulator brownout offset voltage.  <a href="#ga86c8fff119565ff331130a4a860e9b35">More...</a><br/></td></tr>
<tr class="separator:ga86c8fff119565ff331130a4a860e9b35"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga995f4e42184c6f62756236d05cc0f2c7"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu.html#ga995f4e42184c6f62756236d05cc0f2c7">PMU_1P1EnablePullDown</a> (PMU_Type *base, bool enable)</td></tr>
<tr class="memdesc:ga995f4e42184c6f62756236d05cc0f2c7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable the pull-down circuitry in the regulator.  <a href="#ga995f4e42184c6f62756236d05cc0f2c7">More...</a><br/></td></tr>
<tr class="separator:ga995f4e42184c6f62756236d05cc0f2c7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6060fefbaa792bc3b472be682447ccdb"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu.html#ga6060fefbaa792bc3b472be682447ccdb">PMU_1P1EnableCurrentLimit</a> (PMU_Type *base, bool enable)</td></tr>
<tr class="memdesc:ga6060fefbaa792bc3b472be682447ccdb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable the current-limit circuitry in the regulator.  <a href="#ga6060fefbaa792bc3b472be682447ccdb">More...</a><br/></td></tr>
<tr class="separator:ga6060fefbaa792bc3b472be682447ccdb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga761a5725232c461af8f229646f5ab20c"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu.html#ga761a5725232c461af8f229646f5ab20c">PMU_1P1EnableBrownout</a> (PMU_Type *base, bool enable)</td></tr>
<tr class="memdesc:ga761a5725232c461af8f229646f5ab20c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable the brownout circuitry in the regulator.  <a href="#ga761a5725232c461af8f229646f5ab20c">More...</a><br/></td></tr>
<tr class="separator:ga761a5725232c461af8f229646f5ab20c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae884b80510d080986fed8b4a88fe6e77"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu.html#gae884b80510d080986fed8b4a88fe6e77">PMU_1P1EnableOutput</a> (PMU_Type *base, bool enable)</td></tr>
<tr class="memdesc:gae884b80510d080986fed8b4a88fe6e77"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable the regulator output.  <a href="#gae884b80510d080986fed8b4a88fe6e77">More...</a><br/></td></tr>
<tr class="separator:gae884b80510d080986fed8b4a88fe6e77"><td class="memSeparator" colspan="2">&#160;</td></tr>
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
3P0 Regular</h2></td></tr>
<tr class="memitem:ga49c8b1d40457140252c6d71e9760ef96"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu.html#ga49c8b1d40457140252c6d71e9760ef96">PMU_3P0SetRegulatorOutputVoltage</a> (PMU_Type *base, uint32_t value)</td></tr>
<tr class="memdesc:ga49c8b1d40457140252c6d71e9760ef96"><td class="mdescLeft">&#160;</td><td class="mdescRight">Adjust the 3P0 regulator output voltage.  <a href="#ga49c8b1d40457140252c6d71e9760ef96">More...</a><br/></td></tr>
<tr class="separator:ga49c8b1d40457140252c6d71e9760ef96"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7fd889f7fac239475cae5e1fdd9eb220"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu.html#ga7fd889f7fac239475cae5e1fdd9eb220">PMU_3P0SetVBusVoltageSource</a> (PMU_Type *base, <a class="el" href="group__pmu.html#gaf7f949a78166a27563c8a0f2ebc0af31">pmu_3p0_vbus_voltage_source_t</a> option)</td></tr>
<tr class="memdesc:ga7fd889f7fac239475cae5e1fdd9eb220"><td class="mdescLeft">&#160;</td><td class="mdescRight">Select input voltage source for LDO_3P0.  <a href="#ga7fd889f7fac239475cae5e1fdd9eb220">More...</a><br/></td></tr>
<tr class="separator:ga7fd889f7fac239475cae5e1fdd9eb220"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga255543472ab3f09a168bf03fd33d584f"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu.html#ga255543472ab3f09a168bf03fd33d584f">PMU_3P0SetBrownoutOffsetVoltage</a> (PMU_Type *base, uint32_t value)</td></tr>
<tr class="memdesc:ga255543472ab3f09a168bf03fd33d584f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Adjust the 3P0 regulator brownout offset voltage.  <a href="#ga255543472ab3f09a168bf03fd33d584f">More...</a><br/></td></tr>
<tr class="separator:ga255543472ab3f09a168bf03fd33d584f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab3a03db68124d97f4c4737bb5d33206a"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu.html#gab3a03db68124d97f4c4737bb5d33206a">PMU_3P0EnableCurrentLimit</a> (PMU_Type *base, bool enable)</td></tr>
<tr class="memdesc:gab3a03db68124d97f4c4737bb5d33206a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable the current-limit circuitry in the 3P0 regulator.  <a href="#gab3a03db68124d97f4c4737bb5d33206a">More...</a><br/></td></tr>
<tr class="separator:gab3a03db68124d97f4c4737bb5d33206a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga92993c141c89bf54d6125d6638aca595"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu.html#ga92993c141c89bf54d6125d6638aca595">PMU_3P0EnableBrownout</a> (PMU_Type *base, bool enable)</td></tr>
<tr class="memdesc:ga92993c141c89bf54d6125d6638aca595"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable the brownout circuitry in the 3P0 regulator.  <a href="#ga92993c141c89bf54d6125d6638aca595">More...</a><br/></td></tr>
<tr class="separator:ga92993c141c89bf54d6125d6638aca595"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga302cc325f516455ddadd361bcda1f804"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu.html#ga302cc325f516455ddadd361bcda1f804">PMU_3P0EnableOutput</a> (PMU_Type *base, bool enable)</td></tr>
<tr class="memdesc:ga302cc325f516455ddadd361bcda1f804"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable the 3P0 regulator output.  <a href="#ga302cc325f516455ddadd361bcda1f804">More...</a><br/></td></tr>
<tr class="separator:ga302cc325f516455ddadd361bcda1f804"><td class="memSeparator" colspan="2">&#160;</td></tr>
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
2P5 Regulator</h2></td></tr>
<tr class="memitem:ga5e359c604d2a587f8d606de5ae7efc8a"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu.html#ga5e359c604d2a587f8d606de5ae7efc8a">PMU_2P5EnableWeakRegulator</a> (PMU_Type *base, bool enable)</td></tr>
<tr class="memdesc:ga5e359c604d2a587f8d606de5ae7efc8a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enables the weak 2P5 regulator.  <a href="#ga5e359c604d2a587f8d606de5ae7efc8a">More...</a><br/></td></tr>
<tr class="separator:ga5e359c604d2a587f8d606de5ae7efc8a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2a4a038ad26d2f6a88ca6d020503de2e"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu.html#ga2a4a038ad26d2f6a88ca6d020503de2e">PMU_2P5SetRegulatorOutputVoltage</a> (PMU_Type *base, uint32_t value)</td></tr>
<tr class="memdesc:ga2a4a038ad26d2f6a88ca6d020503de2e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Adjust the 1P1 regulator output voltage.  <a href="#ga2a4a038ad26d2f6a88ca6d020503de2e">More...</a><br/></td></tr>
<tr class="separator:ga2a4a038ad26d2f6a88ca6d020503de2e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6e9b26e8745268cced79edb0f020e20c"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu.html#ga6e9b26e8745268cced79edb0f020e20c">PMU_2P5SetBrownoutOffsetVoltage</a> (PMU_Type *base, uint32_t value)</td></tr>
<tr class="memdesc:ga6e9b26e8745268cced79edb0f020e20c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Adjust the 2P5 regulator brownout offset voltage.  <a href="#ga6e9b26e8745268cced79edb0f020e20c">More...</a><br/></td></tr>
<tr class="separator:ga6e9b26e8745268cced79edb0f020e20c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga53c7dcb145496f85d4f9ce657d2d8168"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu.html#ga53c7dcb145496f85d4f9ce657d2d8168">PMU_2P1EnablePullDown</a> (PMU_Type *base, bool enable)</td></tr>
<tr class="memdesc:ga53c7dcb145496f85d4f9ce657d2d8168"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable the pull-down circuitry in the 2P5 regulator.  <a href="#ga53c7dcb145496f85d4f9ce657d2d8168">More...</a><br/></td></tr>
<tr class="separator:ga53c7dcb145496f85d4f9ce657d2d8168"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae29695c43dfe052a7287b0d7b6817164"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu.html#gae29695c43dfe052a7287b0d7b6817164">PMU_2P5EnableCurrentLimit</a> (PMU_Type *base, bool enable)</td></tr>
<tr class="memdesc:gae29695c43dfe052a7287b0d7b6817164"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable the current-limit circuitry in the 2P5 regulator.  <a href="#gae29695c43dfe052a7287b0d7b6817164">More...</a><br/></td></tr>
<tr class="separator:gae29695c43dfe052a7287b0d7b6817164"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2112f8cbcde1a6407c7e612bf17aab61"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu.html#ga2112f8cbcde1a6407c7e612bf17aab61">PMU_2P5nableBrownout</a> (PMU_Type *base, bool enable)</td></tr>
<tr class="memdesc:ga2112f8cbcde1a6407c7e612bf17aab61"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable the brownout circuitry in the 2P5 regulator.  <a href="#ga2112f8cbcde1a6407c7e612bf17aab61">More...</a><br/></td></tr>
<tr class="separator:ga2112f8cbcde1a6407c7e612bf17aab61"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3bb2d104b6253f1c010c9ee7af8af252"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu.html#ga3bb2d104b6253f1c010c9ee7af8af252">PMU_2P5EnableOutput</a> (PMU_Type *base, bool enable)</td></tr>
<tr class="memdesc:ga3bb2d104b6253f1c010c9ee7af8af252"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable the 2P5 regulator output.  <a href="#ga3bb2d104b6253f1c010c9ee7af8af252">More...</a><br/></td></tr>
<tr class="separator:ga3bb2d104b6253f1c010c9ee7af8af252"><td class="memSeparator" colspan="2">&#160;</td></tr>
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
Core Regulator</h2></td></tr>
<tr class="memitem:ga7baf539021e407e5f32ee4334ce31371"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu.html#ga7baf539021e407e5f32ee4334ce31371">PMU_CoreEnableIncreaseGateDrive</a> (PMU_Type *base, bool enable)</td></tr>
<tr class="memdesc:ga7baf539021e407e5f32ee4334ce31371"><td class="mdescLeft">&#160;</td><td class="mdescRight">Increase the gate drive on power gating FETs.  <a href="#ga7baf539021e407e5f32ee4334ce31371">More...</a><br/></td></tr>
<tr class="separator:ga7baf539021e407e5f32ee4334ce31371"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaebff0c51866f730270db5076508552d7"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu.html#gaebff0c51866f730270db5076508552d7">PMU_CoreSetRegulatorVoltageRampRate</a> (PMU_Type *base, <a class="el" href="group__pmu.html#ga4a1cbd5cfe295ba24ff9d6460c3f660e">pmu_core_reg_voltage_ramp_rate_t</a> option)</td></tr>
<tr class="memdesc:gaebff0c51866f730270db5076508552d7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the CORE regulator voltage ramp rate.  <a href="#gaebff0c51866f730270db5076508552d7">More...</a><br/></td></tr>
<tr class="separator:gaebff0c51866f730270db5076508552d7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga24fdaba5fbb1713f5b67e649979124f1"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu.html#ga24fdaba5fbb1713f5b67e649979124f1">PMU_CoreSetSOCDomainVoltage</a> (PMU_Type *base, uint32_t value)</td></tr>
<tr class="memdesc:ga24fdaba5fbb1713f5b67e649979124f1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Define the target voltage for the SOC power domain.  <a href="#ga24fdaba5fbb1713f5b67e649979124f1">More...</a><br/></td></tr>
<tr class="separator:ga24fdaba5fbb1713f5b67e649979124f1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8655aa1a407b17bfa7a1a8ac9e28eafb"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu.html#ga8655aa1a407b17bfa7a1a8ac9e28eafb">PMU_CoreSetARMCoreDomainVoltage</a> (PMU_Type *base, uint32_t value)</td></tr>
<tr class="memdesc:ga8655aa1a407b17bfa7a1a8ac9e28eafb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Define the target voltage for the ARM Core power domain.  <a href="#ga8655aa1a407b17bfa7a1a8ac9e28eafb">More...</a><br/></td></tr>
<tr class="separator:ga8655aa1a407b17bfa7a1a8ac9e28eafb"><td class="memSeparator" colspan="2">&#160;</td></tr>
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
Power Gate Controller &amp; other</h2></td></tr>
<tr class="memitem:ga34f2929edab8ee80aadee8f6d5fe1ccb"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu.html#ga34f2929edab8ee80aadee8f6d5fe1ccb">PMU_GatePower</a> (PMU_Type *base, uint32_t gates)</td></tr>
<tr class="memdesc:ga34f2929edab8ee80aadee8f6d5fe1ccb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Gate the power to modules.  <a href="#ga34f2929edab8ee80aadee8f6d5fe1ccb">More...</a><br/></td></tr>
<tr class="separator:ga34f2929edab8ee80aadee8f6d5fe1ccb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga627a3c883972caa4a3f3f6c9882737ed"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu.html#ga627a3c883972caa4a3f3f6c9882737ed">PMU_UngatePower</a> (PMU_Type *base, uint32_t gates)</td></tr>
<tr class="memdesc:ga627a3c883972caa4a3f3f6c9882737ed"><td class="mdescLeft">&#160;</td><td class="mdescRight">Ungate the power to modules.  <a href="#ga627a3c883972caa4a3f3f6c9882737ed">More...</a><br/></td></tr>
<tr class="separator:ga627a3c883972caa4a3f3f6c9882737ed"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga079d1fb2495ea0d094d957d667259893"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu.html#ga079d1fb2495ea0d094d957d667259893">PMU_EnableLowPowerBandgap</a> (PMU_Type *base, bool enable)</td></tr>
<tr class="memdesc:ga079d1fb2495ea0d094d957d667259893"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable the low power bandgap.  <a href="#ga079d1fb2495ea0d094d957d667259893">More...</a><br/></td></tr>
<tr class="separator:ga079d1fb2495ea0d094d957d667259893"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table>
<h2 class="groupheader">Macro Definition Documentation</h2>
<a class="anchor" id="ga0dc3464cb828e0c8195cf6f4fd9fc9a8"></a>
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<div class="memproto">
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          <td class="memname">#define FSL_PMU_DRIVER_VERSION&#160;&#160;&#160;(MAKE_VERSION(2, 0, 0))</td>
        </tr>
      </table>
</div><div class="memdoc">
<p>Version 2.0.0. </p>

</div>
</div>
<h2 class="groupheader">Enumeration Type Documentation</h2>
<a class="anchor" id="ga91d439b8d5584f55f3e596963d3db8c3"></a>
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<div class="memproto">
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          <td class="memname">enum <a class="el" href="group__pmu.html#ga91d439b8d5584f55f3e596963d3db8c3">_pmu_status_flags</a></td>
        </tr>
      </table>
</div><div class="memdoc">
<table class="fieldtable">
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="gga91d439b8d5584f55f3e596963d3db8c3a394fea19008801a519d8739020709a19"></a>kPMU_1P1RegulatorOutputOK</em>&nbsp;</td><td class="fielddoc">
<p>Status bit that signals when the 1p1 regulator output is ok. </p>
<p>1 = regulator output &gt; brownout target. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga91d439b8d5584f55f3e596963d3db8c3ac52322dd21cce9696c3dd7291f01808e"></a>kPMU_1P1BrownoutOnOutput</em>&nbsp;</td><td class="fielddoc">
<p>Status bit that signals when a 1p1 brownout is detected on the regulator output. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga91d439b8d5584f55f3e596963d3db8c3a5d2df2491523287e130b1e36ff457d42"></a>kPMU_3P0RegulatorOutputOK</em>&nbsp;</td><td class="fielddoc">
<p>Status bit that signals when the 3p0 regulator output is ok. </p>
<p>1 = regulator output &gt; brownout target. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga91d439b8d5584f55f3e596963d3db8c3a76b4070aa90b7471b8f95481f96d20f7"></a>kPMU_3P0BrownoutOnOutput</em>&nbsp;</td><td class="fielddoc">
<p>Status bit that signals when a 3p0 brownout is detected on the regulator output. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga91d439b8d5584f55f3e596963d3db8c3a536d44e80cffab2c47b9144628dac099"></a>kPMU_2P5RegulatorOutputOK</em>&nbsp;</td><td class="fielddoc">
<p>Status bit that signals when the 2p5 regulator output is ok. </p>
<p>1 = regulator output &gt; brownout target. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga91d439b8d5584f55f3e596963d3db8c3a74380ff6243784a0a997d9d69420b351"></a>kPMU_2P5BrownoutOnOutput</em>&nbsp;</td><td class="fielddoc">
<p>Status bit that signals when a 2p5 brownout is detected on the regulator output. </p>
</td></tr>
</table>

</div>
</div>
<a class="anchor" id="ga6b47a2e7d1775049cdcfb744b37ecadb"></a>
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          <td class="memname">enum <a class="el" href="group__pmu.html#ga6b47a2e7d1775049cdcfb744b37ecadb">pmu_1p1_weak_reference_source_t</a></td>
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      </table>
</div><div class="memdoc">
<table class="fieldtable">
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="gga6b47a2e7d1775049cdcfb744b37ecadba66d71c9d447ecdb90b6b2b1bd025168e"></a>kPMU_1P1WeakReferenceSourceAlt0</em>&nbsp;</td><td class="fielddoc">
<p>Weak-linreg output tracks low-power-bandgap voltage. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga6b47a2e7d1775049cdcfb744b37ecadbace5078924f5b087c2791e3fc6ba958e4"></a>kPMU_1P1WeakReferenceSourceAlt1</em>&nbsp;</td><td class="fielddoc">
<p>Weak-linreg output tracks VDD_SOC_CAP voltage. </p>
</td></tr>
</table>

</div>
</div>
<a class="anchor" id="gaf7f949a78166a27563c8a0f2ebc0af31"></a>
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        <tr>
          <td class="memname">enum <a class="el" href="group__pmu.html#gaf7f949a78166a27563c8a0f2ebc0af31">pmu_3p0_vbus_voltage_source_t</a></td>
        </tr>
      </table>
</div><div class="memdoc">
<table class="fieldtable">
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="ggaf7f949a78166a27563c8a0f2ebc0af31a825e44d25be34386eadd03f99b66f857"></a>kPMU_3P0VBusVoltageSourceAlt0</em>&nbsp;</td><td class="fielddoc">
<p>USB_OTG1_VBUS - Utilize VBUS OTG1 for power. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="ggaf7f949a78166a27563c8a0f2ebc0af31aefdca33e631b3b7b3b9b6a412254b2f7"></a>kPMU_3P0VBusVoltageSourceAlt1</em>&nbsp;</td><td class="fielddoc">
<p>USB_OTG2_VBUS - Utilize VBUS OTG2 for power. </p>
</td></tr>
</table>

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</div>
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          <td class="memname">enum <a class="el" href="group__pmu.html#ga4a1cbd5cfe295ba24ff9d6460c3f660e">pmu_core_reg_voltage_ramp_rate_t</a></td>
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      </table>
</div><div class="memdoc">
<table class="fieldtable">
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="gga4a1cbd5cfe295ba24ff9d6460c3f660eacf2fdfb31db3e83e3306c3d98ffbe9f9"></a>kPMU_CoreRegVoltageRampRateFast</em>&nbsp;</td><td class="fielddoc">
<p>Fast. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga4a1cbd5cfe295ba24ff9d6460c3f660eadab48795d60139c6009a5de52277aa7f"></a>kPMU_CoreRegVoltageRampRateMediumFast</em>&nbsp;</td><td class="fielddoc">
<p>Medium Fast. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga4a1cbd5cfe295ba24ff9d6460c3f660ea2afb37a84985c3eeb1146aaee869f891"></a>kPMU_CoreRegVoltageRampRateMediumSlow</em>&nbsp;</td><td class="fielddoc">
<p>Medium Slow. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga4a1cbd5cfe295ba24ff9d6460c3f660ea8744a5ed680a59150feca86ba0357d12"></a>kPMU_CoreRegVoltageRampRateSlow</em>&nbsp;</td><td class="fielddoc">
<p>Slow. </p>
</td></tr>
</table>

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          <td class="memname">enum <a class="el" href="group__pmu.html#ga65e18b042624dd19870ac095ab6aef01">_pmu_power_gate</a></td>
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      </table>
</div><div class="memdoc">
<table class="fieldtable">
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="gga65e18b042624dd19870ac095ab6aef01af1c5da57cf62f187a6ddf0c8fce6170f"></a>kPMU_PowerGateDisplay</em>&nbsp;</td><td class="fielddoc">
<p>Display power gate control. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga65e18b042624dd19870ac095ab6aef01a073ae1b9d06d288c20385ee44ee1238b"></a>kPMU_PowerGateDisplayLogic</em>&nbsp;</td><td class="fielddoc">
<p>Display logic power gate control. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga65e18b042624dd19870ac095ab6aef01a4bcd6884f0891a6905afb5f21230568b"></a>kPMU_PowerGateL2</em>&nbsp;</td><td class="fielddoc">
<p>L2 power gate control. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga65e18b042624dd19870ac095ab6aef01a2e6b7f9e7ebe3225d3b5bf79ec206b3d"></a>kPMU_PowerGateL1</em>&nbsp;</td><td class="fielddoc">
<p>L1 power gate control. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga65e18b042624dd19870ac095ab6aef01aed0c6e0fb000887afcfee7d55be9c6b5"></a>kPMU_PowerGateRefTopIBias</em>&nbsp;</td><td class="fielddoc">
<p>Low power reftop ibias disable. </p>
</td></tr>
</table>

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          <td class="memname">enum <a class="el" href="group__pmu.html#ga8178a1394f1448946497f11062aac986">pmu_power_bandgap_t</a></td>
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<table class="fieldtable">
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="gga8178a1394f1448946497f11062aac986a47cf46f2e5470bebdd7babc9b4d3cd20"></a>kPMU_NormalPowerBandgap</em>&nbsp;</td><td class="fielddoc">
<p>Normal power bandgap. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga8178a1394f1448946497f11062aac986a8f4daf5e5847e848d7feb71b99685763"></a>kPMU_LowPowerBandgap</em>&nbsp;</td><td class="fielddoc">
<p>Low power bandgap. </p>
</td></tr>
</table>

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<h2 class="groupheader">Function Documentation</h2>
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          <td class="memname">static void PMU_1P1SetWeakReferenceSource </td>
          <td>(</td>
          <td class="paramtype">PMU_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
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          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__pmu.html#ga6b47a2e7d1775049cdcfb744b37ecadb">pmu_1p1_weak_reference_source_t</a>&#160;</td>
          <td class="paramname"><em>option</em>&#160;</td>
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          <td>)</td>
          <td></td><td></td>
        </tr>
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<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>PMU peripheral base address. </td></tr>
    <tr><td class="paramname">option</td><td>The option for reference voltage source, see to <a class="el" href="group__pmu.html#ga6b47a2e7d1775049cdcfb744b37ecadb" title="The source for the reference voltage of the weak 1P1 regulator. ">pmu_1p1_weak_reference_source_t</a>. </td></tr>
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  </dd>
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          <td class="memname">static void PMU_1P1EnableWeakRegulator </td>
          <td>(</td>
          <td class="paramtype">PMU_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
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          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">bool&#160;</td>
          <td class="paramname"><em>enable</em>&#160;</td>
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          <td></td>
          <td>)</td>
          <td></td><td></td>
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<p>This regulator can be used when the main 1P1 regulator is disabled, under low-power conditions.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>PMU peripheral base address. </td></tr>
    <tr><td class="paramname">enable</td><td>Enable the feature or not. </td></tr>
  </table>
  </dd>
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          <td class="memname">static void PMU_1P1SetRegulatorOutputVoltage </td>
          <td>(</td>
          <td class="paramtype">PMU_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
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          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>value</em>&#160;</td>
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<p>Each LSB is worth 25mV. Programming examples are detailed below. Other output target voltages may be interpolated from these examples. Choices must be in this range:</p>
<ul>
<li>0x1b(1.375V) &gt;= output_trg &gt;= 0x04(0.8V)</li>
<li>0x04 : 0.8V</li>
<li>0x10 : 1.1V (typical)</li>
<li>0x1b : 1.375V NOTE: There may be reduced chip functionality or reliability at the extremes of the programming range.</li>
</ul>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>PMU peripheral base address. </td></tr>
    <tr><td class="paramname">value</td><td>Setting value for the output. </td></tr>
  </table>
  </dd>
</dl>

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          <td class="memname">static void PMU_1P1SetBrownoutOffsetVoltage </td>
          <td>(</td>
          <td class="paramtype">PMU_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
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          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>value</em>&#160;</td>
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<p>Control bits to adjust the regulator brownout offset voltage in 25mV steps. The reset brown-offset is 175mV below the programmed target code. Brownout target = OUTPUT_TRG - BO_OFFSET. Some steps may be irrelevant because of input supply limitations or load operation.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>PMU peripheral base address. </td></tr>
    <tr><td class="paramname">value</td><td>Setting value for the brownout offset. The available range is in 3-bit. </td></tr>
  </table>
  </dd>
</dl>

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          <td class="memname">static void PMU_1P1EnablePullDown </td>
          <td>(</td>
          <td class="paramtype">PMU_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
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          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">bool&#160;</td>
          <td class="paramname"><em>enable</em>&#160;</td>
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          <td>)</td>
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<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>PMU peripheral base address. </td></tr>
    <tr><td class="paramname">enable</td><td>Enable the feature or not. </td></tr>
  </table>
  </dd>
</dl>

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          <td class="memname">static void PMU_1P1EnableCurrentLimit </td>
          <td>(</td>
          <td class="paramtype">PMU_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
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          <td class="paramname"><em>enable</em>&#160;</td>
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<dl class="params"><dt>Parameters</dt><dd>
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    <tr><td class="paramname">base</td><td>PMU peripheral base address. </td></tr>
    <tr><td class="paramname">enable</td><td>Enable the feature or not. </td></tr>
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  </dd>
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          <td class="memname">static void PMU_1P1EnableBrownout </td>
          <td>(</td>
          <td class="paramtype">PMU_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
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          <td class="paramname"><em>enable</em>&#160;</td>
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<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>PMU peripheral base address. </td></tr>
    <tr><td class="paramname">enable</td><td>Enable the feature or not. </td></tr>
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  </dd>
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          <td class="memname">static void PMU_1P1EnableOutput </td>
          <td>(</td>
          <td class="paramtype">PMU_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
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          <td class="paramname"><em>enable</em>&#160;</td>
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<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>PMU peripheral base address. </td></tr>
    <tr><td class="paramname">enable</td><td>Enable the feature or not. </td></tr>
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  </dd>
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          <td class="memname">static void PMU_3P0SetRegulatorOutputVoltage </td>
          <td>(</td>
          <td class="paramtype">PMU_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>value</em>&#160;</td>
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<p>Each LSB is worth 25mV. Programming examples are detailed below. Other output target voltages may be interpolated from these examples. Choices must be in this range:</p>
<ul>
<li>0x00(2.625V) &gt;= output_trg &gt;= 0x1f(3.4V)</li>
<li>0x00 : 2.625V</li>
<li>0x0f : 3.0V (typical)</li>
<li>0x1f : 3.4V</li>
</ul>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>PMU peripheral base address. </td></tr>
    <tr><td class="paramname">value</td><td>Setting value for the output. </td></tr>
  </table>
  </dd>
</dl>

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          <td class="memname">static void PMU_3P0SetVBusVoltageSource </td>
          <td>(</td>
          <td class="paramtype">PMU_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
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          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__pmu.html#gaf7f949a78166a27563c8a0f2ebc0af31">pmu_3p0_vbus_voltage_source_t</a>&#160;</td>
          <td class="paramname"><em>option</em>&#160;</td>
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          <td></td>
          <td>)</td>
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        </tr>
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<p>Select input voltage source for LDO_3P0 from either USB_OTG1_VBUS or USB_OTG2_VBUS. If only one of the two VBUS voltages is present, it is automatically selected.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>PMU peripheral base address. </td></tr>
    <tr><td class="paramname">option</td><td>User-defined input voltage source for LDO_3P0. </td></tr>
  </table>
  </dd>
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          <td class="memname">static void PMU_3P0SetBrownoutOffsetVoltage </td>
          <td>(</td>
          <td class="paramtype">PMU_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>value</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
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        </tr>
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<p>Control bits to adjust the 3P0 regulator brownout offset voltage in 25mV steps. The reset brown-offset is 175mV below the programmed target code. Brownout target = OUTPUT_TRG - BO_OFFSET. Some steps may be irrelevant because of input supply limitations or load operation.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>PMU peripheral base address. </td></tr>
    <tr><td class="paramname">value</td><td>Setting value for the brownout offset. The available range is in 3-bit. </td></tr>
  </table>
  </dd>
</dl>

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          <td class="memname">static void PMU_3P0EnableCurrentLimit </td>
          <td>(</td>
          <td class="paramtype">PMU_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">bool&#160;</td>
          <td class="paramname"><em>enable</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>PMU peripheral base address. </td></tr>
    <tr><td class="paramname">enable</td><td>Enable the feature or not. </td></tr>
  </table>
  </dd>
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          <td class="memname">static void PMU_3P0EnableBrownout </td>
          <td>(</td>
          <td class="paramtype">PMU_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
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          <td class="paramname"><em>enable</em>&#160;</td>
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<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>PMU peripheral base address. </td></tr>
    <tr><td class="paramname">enable</td><td>Enable the feature or not. </td></tr>
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  </dd>
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          <td class="memname">static void PMU_3P0EnableOutput </td>
          <td>(</td>
          <td class="paramtype">PMU_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
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<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>PMU peripheral base address. </td></tr>
    <tr><td class="paramname">enable</td><td>Enable the feature or not. </td></tr>
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  </dd>
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          <td class="memname">static void PMU_2P5EnableWeakRegulator </td>
          <td>(</td>
          <td class="paramtype">PMU_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
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          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">bool&#160;</td>
          <td class="paramname"><em>enable</em>&#160;</td>
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          <td>)</td>
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<p>This low power regulator is used when the main 2P5 regulator is disabled to keep the 2.5V output roughly at 2.5V. Scales directly with the value of VDDHIGH_IN.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>PMU peripheral base address. </td></tr>
    <tr><td class="paramname">enable</td><td>Enable the feature or not. </td></tr>
  </table>
  </dd>
</dl>

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          <td class="memname">static void PMU_2P5SetRegulatorOutputVoltage </td>
          <td>(</td>
          <td class="paramtype">PMU_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>value</em>&#160;</td>
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          <td>)</td>
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<p>Each LSB is worth 25mV. Programming examples are detailed below. Other output target voltages may be interpolated from these examples. Choices must be in this range:</p>
<ul>
<li>0x00(2.1V) &gt;= output_trg &gt;= 0x1f(2.875V)</li>
<li>0x00 : 2.1V</li>
<li>0x10 : 2.5V (typical)</li>
<li>0x1f : 2.875V NOTE: There may be reduced chip functionality or reliability at the extremes of the programming range.</li>
</ul>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>PMU peripheral base address. </td></tr>
    <tr><td class="paramname">value</td><td>Setting value for the output. </td></tr>
  </table>
  </dd>
</dl>

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          <td class="memname">static void PMU_2P5SetBrownoutOffsetVoltage </td>
          <td>(</td>
          <td class="paramtype">PMU_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>value</em>&#160;</td>
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        <tr>
          <td></td>
          <td>)</td>
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<p>Adjust the regulator brownout offset voltage in 25mV steps. The reset brown-offset is 175mV below the programmed target code. Brownout target = OUTPUT_TRG - BO_OFFSET. Some steps may be irrelevant because of input supply limitations or load operation.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>PMU peripheral base address. </td></tr>
    <tr><td class="paramname">value</td><td>Setting value for the brownout offset. The available range is in 3-bit. </td></tr>
  </table>
  </dd>
</dl>

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          <td class="memname">static void PMU_2P1EnablePullDown </td>
          <td>(</td>
          <td class="paramtype">PMU_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
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          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">bool&#160;</td>
          <td class="paramname"><em>enable</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
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        </tr>
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<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>PMU peripheral base address. </td></tr>
    <tr><td class="paramname">enable</td><td>Enable the feature or not. </td></tr>
  </table>
  </dd>
</dl>

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          <td class="memname">static void PMU_2P5EnableCurrentLimit </td>
          <td>(</td>
          <td class="paramtype">PMU_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
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          <td class="paramtype">bool&#160;</td>
          <td class="paramname"><em>enable</em>&#160;</td>
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          <td>)</td>
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<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>PMU peripheral base address. </td></tr>
    <tr><td class="paramname">enable</td><td>Enable the feature or not. </td></tr>
  </table>
  </dd>
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          <td class="memname">static void PMU_2P5nableBrownout </td>
          <td>(</td>
          <td class="paramtype">PMU_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
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          <td class="paramtype">bool&#160;</td>
          <td class="paramname"><em>enable</em>&#160;</td>
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          <td>)</td>
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<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>PMU peripheral base address. </td></tr>
    <tr><td class="paramname">enable</td><td>Enable the feature or not. </td></tr>
  </table>
  </dd>
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          <td class="memname">static void PMU_2P5EnableOutput </td>
          <td>(</td>
          <td class="paramtype">PMU_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">bool&#160;</td>
          <td class="paramname"><em>enable</em>&#160;</td>
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          <td>)</td>
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<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>PMU peripheral base address. </td></tr>
    <tr><td class="paramname">enable</td><td>Enable the feature or not. </td></tr>
  </table>
  </dd>
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          <td class="memname">static void PMU_CoreEnableIncreaseGateDrive </td>
          <td>(</td>
          <td class="paramtype">PMU_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
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          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">bool&#160;</td>
          <td class="paramname"><em>enable</em>&#160;</td>
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          <td>)</td>
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<p>If set, increases the gate drive on power gating FETs to reduce leakage in the off state. Care must be taken to apply this bit only when the input supply voltage to the power FET is less than 1.1V. NOTE: This bit should only be used in low-power modes where the external input supply voltage is nominally 0.9V.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>PMU peripheral base address. </td></tr>
    <tr><td class="paramname">enable</td><td>Enable the feature or not. </td></tr>
  </table>
  </dd>
</dl>

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          <td class="memname">static void PMU_CoreSetRegulatorVoltageRampRate </td>
          <td>(</td>
          <td class="paramtype">PMU_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__pmu.html#ga4a1cbd5cfe295ba24ff9d6460c3f660e">pmu_core_reg_voltage_ramp_rate_t</a>&#160;</td>
          <td class="paramname"><em>option</em>&#160;</td>
        </tr>
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          <td>)</td>
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        </tr>
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<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>PMU peripheral base address. </td></tr>
    <tr><td class="paramname">option</td><td>User-defined option for voltage ramp rate, see to <a class="el" href="group__pmu.html#ga4a1cbd5cfe295ba24ff9d6460c3f660e" title="Regulator voltage ramp rate. ">pmu_core_reg_voltage_ramp_rate_t</a>. </td></tr>
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          <td class="memname">static void PMU_CoreSetSOCDomainVoltage </td>
          <td>(</td>
          <td class="paramtype">PMU_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>value</em>&#160;</td>
        </tr>
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          <td></td>
          <td>)</td>
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<p>Define the target voltage for the SOC power domain. Single-bit increments reflect 25mV core voltage steps. Some steps may not be relevant because of input supply limitations or load operation.</p>
<ul>
<li>0x00 : Power gated off.</li>
<li>0x01 : Target core voltage = 0.725V</li>
<li>0x02 : Target core voltage = 0.750V</li>
<li>...</li>
<li>0x10 : Target core voltage = 1.100V</li>
<li>...</li>
<li>0x1e : Target core voltage = 1.450V</li>
<li>0x1F : Power FET switched full on. No regulation. NOTE: This register is capable of programming an over-voltage condition on the device. Consult the datasheet Operating Ranges table for the allowed voltages.</li>
</ul>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>PMU peripheral base address. </td></tr>
    <tr><td class="paramname">value</td><td>Setting value for target voltage. 5-bit available </td></tr>
  </table>
  </dd>
</dl>

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          <td class="memname">static void PMU_CoreSetARMCoreDomainVoltage </td>
          <td>(</td>
          <td class="paramtype">PMU_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>value</em>&#160;</td>
        </tr>
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          <td></td>
          <td>)</td>
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<p>Define the target voltage for the ARM Core power domain. Single-bit increments reflect 25mV core voltage steps. Some steps may not be relevant because of input supply limitations or load operation.</p>
<ul>
<li>0x00 : Power gated off.</li>
<li>0x01 : Target core voltage = 0.725V</li>
<li>0x02 : Target core voltage = 0.750V</li>
<li>...</li>
<li>0x10 : Target core voltage = 1.100V</li>
<li>...</li>
<li>0x1e : Target core voltage = 1.450V</li>
<li>0x1F : Power FET switched full on. No regulation. NOTE: This register is capable of programming an over-voltage condition on the device. Consult the datasheet Operating Ranges table for the allowed voltages.</li>
</ul>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>PMU peripheral base address. </td></tr>
    <tr><td class="paramname">value</td><td>Setting value for target voltage. 5-bit available </td></tr>
  </table>
  </dd>
</dl>

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          <td class="memname">static void PMU_GatePower </td>
          <td>(</td>
          <td class="paramtype">PMU_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>gates</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
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        </tr>
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<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>PMU peripheral base address. </td></tr>
    <tr><td class="paramname">gates</td><td>Mask value for the module to be gated. See to <a class="el" href="group__pmu.html#ga65e18b042624dd19870ac095ab6aef01" title="Mask values of power gate. ">_pmu_power_gate</a>. </td></tr>
  </table>
  </dd>
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          <td class="memname">static void PMU_UngatePower </td>
          <td>(</td>
          <td class="paramtype">PMU_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>gates</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
  </td>
  <td class="mlabels-right">
<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span>  </td>
  </tr>
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</div><div class="memdoc">
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>PMU peripheral base address. </td></tr>
    <tr><td class="paramname">gates</td><td>Mask value for the module to be gated. See to <a class="el" href="group__pmu.html#ga65e18b042624dd19870ac095ab6aef01" title="Mask values of power gate. ">_pmu_power_gate</a>. </td></tr>
  </table>
  </dd>
</dl>

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<div class="memitem">
<div class="memproto">
<table class="mlabels">
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  <td class="mlabels-left">
      <table class="memname">
        <tr>
          <td class="memname">static void PMU_EnableLowPowerBandgap </td>
          <td>(</td>
          <td class="paramtype">PMU_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">bool&#160;</td>
          <td class="paramname"><em>enable</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
  </td>
  <td class="mlabels-right">
<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span>  </td>
  </tr>
</table>
</div><div class="memdoc">
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>PMU peripheral base address. </td></tr>
    <tr><td class="paramname">enable</td><td>Enable the low power bandgap or use the normal power bandgap. @ </td></tr>
  </table>
  </dd>
</dl>

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